IEEE Access, cilt.12, ss.9195-9205, 2024 (SCI-Expanded, Scopus)
A new proposition of passive (no external DC bias) memristor emulator (MRE) utilizing DTMOS technique which consists of four MOSFETs and a capacitor has been presented. The proposed MRE exhibits high operating frequency (~ 500MHz), zero static power and shows incremental behavior. The conventional mathematical equation of MRE has been derived considering the second-order effects of all the MOSFETs utilized. The proposed circuit has been simulated by the Cadence Virtuoso (IC617) spectre tool using 180nm technology parameters. The layout occupies 1305μm2 area. The experimental verification has been carried out utilizing ALD1116 and ALD1117 dual N-channel and P-channel MOSFET arrays to demonstrate the practical viability. Finally, different possible applications namely; analog filters, oscillators (simple and chaotic), Schmitt trigger, Amoeba learning have been realized using proposed MRE to show its neuromorphic capability. Also, new logical AND & OR and NOT circuit configurations have been designed using proposed MRE.