Akademik Veri Yönetim Sistemi
AEU - International Journal of Electronics and Communications, cilt.209, 2026 (SCI-Expanded, Scopus)
Buck converters, essential in DC/DC power conversion, offer high efficiency and low EMI for low-voltage systems. Yet, traditional compensation circuits need large capacitors, increasing chip area and integration cost. This study proposes a novel capacitance multiplier circuit as an alternative to high-value capacitors in the compensation structure of buck converters. The circuit features an electronically tunable and floating configuration, providing flexibility in design and enabling significant chip area savings. It is implemented using 0.18 μm TSMC CMOS technology and evaluated through both time-domain and frequency-domain simulations in LTspice. The performance of the proposed design is benchmarked against existing capacitor multiplier circuits in the literature. Results show that the proposed circuit achieves comparable electrical performance while significantly reducing the required silicon area. Furthermore, Monte Carlo and PVT (Process, Voltage, Temperature) analyses confirm its robustness and stability under variations in process, supply voltage, and temperature. Finally, the proposed capacitance multiplier is integrated as a compensation element within a Type-II compensation block of a buck-type DC/DC converter operating under a peak current mode control scheme. Simulation results demonstrate successful operation under nominal, variable load, and input voltage conditions. Frequency-domain analysis further verifies system stability by confirming a sufficient phase margin.